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SoC-Generator
Its 2025, chip design doesn't have to be difficult. Transform your workflow with automated SOC design
RISC-V Cores
Our Core-hub generator gives you full control to configure your core-hubs at the ISA and microarchitecture level
Reference SoC designs
RISC-V done for you - License SoC designs perfected by our partners using our technology
I2AP
A zero-cost, scalable RISC-V access program, offering unlimited access to our Azurite™ series of cores.
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SoC-Generator
RISC-V Core-hub Generators
Reference SoC Designs
I2AP
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InCore!
People, tech, culture, innovation and much more. Take a deep dive into our extensive blogs. Explore latest insights, trends, and updates in the world of processor design and innovation.
Industry
24 February, 2025
RISC-V Memory Protection: Diving Deep into the Complexities
Read more
Industry
10 February, 2025
A Compelling Case for Using BSV (Bluespec System Verilog) in Academia: Insights from Redesigning a Capstone Project
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Industry
30 January, 2025
The Age of Custom Silicon
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Indian RISC-V Chronicles
2 December, 2024
Challenges with Open Source RISC-V Cores
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Indian RISC-V Chronicles
3 September, 2024
SHAKTI’s Genesis
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